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NCS2535 Triple 1.4 GHz Current Feedback Op Amp with Enable Feature
NCS2535 is a triple 1.4 GHz current feedback monolithic operational amplifier featuring high slew rate and low differential gain and phase error. The current feedback architecture allows for a superior bandwidth and low power consumption. This device features an enable pin.
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16 NCS 2535 ALYWG G
* * * * * * * * * * * *
-3.0 dB Small Signal BW (AV = +2.0, VO = 0.5 Vp-p) 1.4 GHz Typ Slew Rate 2500 V/ms Supply Current 12 mA per Amplifier Input Referred Voltage Noise 5.0 nV/ Hz THD -69 dB (f = 5.0 MHz, VO = 2.0 Vp-p) Output Current 120 mA Enable Pin Available This is a Pb-Free Device High Resolution Video Line Driver High-Speed Instrumentation Wide Dynamic Range IF Amp
6 3 0 -3 -6 -9 -12 -15 VOUT = 2.0 VPP AV = +2 VS = 5 V RF = 330 W RL = 150 W 10k 100k 1M 10M 100M FREQUENCY (Hz) 1G 10G VOUT = 0.5 VPP
1
TSSOP-16 DT SUFFIX CASE 948F
Applications
NCS2535 = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location) TSSOP-16 PINOUT -IN1 +IN1 VEE1 -IN2 +IN2 VEE2 -IN3 +IN3 1 2 3 4 5 6 7 8 - + (Top View) - + - + 16 EN1 15 OUT1 14 VCC1 13 EN2 12 OUT2 11 9 VCC2 EN3 10 OUT3
NORMALIZED GAIN (dB)
VOUT = 1.0 VPP
ORDERING INFORMATION
Device NCS2535DTG NCS2535DTR2G Package TSSOP-16 Shipping 96 Units/Rail
TSSOP-16 2500 Tape & Reel
Figure 1. Frequency Response: Gain (dB) vs. Frequency Av = +2.0
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2006
May, 2006 - Rev. 1
1
Publication Order Number: NCS2535/D
NCS2535
PIN FUNCTION DESCRIPTION
Pin 9, 12, 15 Symbol OUTx Function Output Equivalent Circuit
VCC ESD OUT
VEE
3, 6 2, 5, 8
VEE +INx
Negative Power Supply Non-inverted Input
ESD +IN VCC ESD -IN
VEE
1, 4, 7 11, 14 10, 13, 16
-INx VCC EN
Inverted Input Positive Power Supply Enable
EN
See Above
VCC ESD
VEE
ENABLE PIN TRUTH TABLE
High Enable *Default open state
VCC
Low* Enabled
Disabled
+IN -IN
OUT
CC
VEE
Figure 2. Simplified Device Schematic
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ATTRIBUTES
Characteristics ESD Human Body Model Machine Model Charged Device Model Moisture Sensitivity (Note 2) Flammability Rating Oxygen Index: 28 to 34 Value 2.0 kV (Note 1) 200 V 1.0 kV Level 1 UL 94 V-0 @ 0.125 in
1. 0.8 kV between the input pairs +IN and -IN pins only. All other pins are 2.0 kV. 2. For additional information, see Application Note AND8003/D.
MAXIMUM RATINGS
Parameter Power Supply Voltage Input Voltage Range Input Differential Voltage Range Output Current Maximum Junction Temperature (Note 3) Operating Ambient Temperature Storage Temperature Range Power Dissipation Thermal Resistance, Junction-to-Air Symbol VS VI VID IO TJ TA Tstg PD RqJA Rating 11 vVS vVS 120 150 -40 to +85 -60 to +150 (See Graph) 156 Unit Vdc Vdc Vdc mA C C C mW C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 3. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded.
MAXIMUM POWER DISSIPATION
Maximum Power Dissapation (mW)
The maximum power that can be safely dissipated is limited by the associated rise in junction temperature. For the plastic packages, the maximum safe junction temperature is 150C. If the maximum is exceeded momentarily, proper circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in the "overheated'' condition for an extended period can result in device damage. To ensure proper operation, it is important to observe the derating curves.
1800 1600 1400
1200
1000 800 600 400 200 0 -50 -25 0 50 75 25 100 Ambient Temperature (C) 125 150
Figure 3. Power Dissipation vs. Temperature
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AC ELECTRICAL CHARACTERISTICS (VCC = +5.0 V, VEE = -5.0 V, TA = -40C to +85C, RL = 150 W to GND, RF = 330 W, AV = +2.0, Enable is left open, unless otherwise specified).
Symbol Characteristic Conditions Min Typ Max Unit FREQUENCY DOMAIN PERFORMANCE BW Bandwidth 3.0 dB Small Signal 3.0 dB Large Signal 0.1 dB Gain Flatness Bandwidth Differential Gain Differential Phase MHz AV = +2.0, VO = 0.5 Vp-p AV = +2.0, VO = 2.0 Vp-p AV = +2.0 AV = +2.0, RL = 150 W, f = 3.58 MHz AV = +2.0, RL = 150 W, f = 3.58 MHz AV = +2.0, Vstep = 2.0 V AV = +2.0, Vstep = 2.0 V (10%-90%) AV = +2.0, Vstep = 2.0 V 1400 650 120 0.02 0.02 MHz %
GF0.1dB dG dP
TIME DOMAIN RESPONSE SR ts tr tf tON tOFF THD HD2 HD3 IP3 SFDR eN iN Slew Rate Settling Time 0.1% Rise and Fall Time Turn-on Time Turn-off Time 2500 13 1.5 55 55 ns ns ns V/ms ns
HARMONIC/NOISE PERFORMANCE Total Harmonic Distortion 2nd Harmonic Distortion 3rd Harmonic Distortion Third-Order Intercept Spurious-Free Dynamic Range Input Referred Voltage Noise Input Referred Current Noise f = 5.0 MHz, VO = 2.0 Vp-p f = 5.0 MHz, VO = 2.0 Vp-p f = 5.0 MHz, VO = 2.0 Vp-p f = 10 MHz, VO = 1.0 Vp-p f = 5.0 MHz, VO = 2.0 Vp-p f = 1.0 MHz f = 1.0 MHz, Inverting f = 1.0 MHz, Non-Inverting -69 -73 -73 34 73 5.0 20 30 dB dBc dBc dBm dBc nV pA Hz Hz
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DC ELECTRICAL CHARACTERISTICS (VCC = +5.0 V, VEE = -5.0 V, TA = -40C to +85C, RL = 150 W to GND, RF = 330 W, AV = +2.0, Enable is left open, unless otherwise specified).
Symbol Characteristic Conditions Min Typ Max Unit DC PERFORMANCE VIO DVIO/DT IIB DIIB/DT VIH VIL Input Offset Voltage Input Offset Voltage Temperature Coefficient Input Bias Current Input Bias Current Temperature Coefficient Input High Voltage (Enable) (Note 4) Input Low Voltage (Enable) (Note 4) +Input (Non-Inverting), VO = 0 V -Input (Inverting), VO = 0 V (Note 4) +Input (Non-Inverting), VO = 0 V -Input (Inverting), VO = 0 V +3.0 +1.0 -10 0 6.0 "3.0 "6.0 +40 -10 "35 "35 10 mV mV/C mA nA/C V V
INPUT CHARACTERISTICS VCM CMRR RIN CIN Input Common Mode Voltage Range (Note 4) Common Mode Rejection Ratio Input Resistance Differential Input Capacitance (See Graph) +Input (Non-Inverting) -Input (Inverting) "3.0 40 "4.0 50 150 70 1.0 V dB kW W pF
OUTPUT CHARACTERISTICS ROUT VO IO VS IS,ON Output Resistance Output Voltage Range Output Current Closed Loop Open Loop "3.0 "80 0.1 13 "4.0 "120 10 VO = 0 V 6.0 12 18 W V mA
POWER SUPPLY Operating Voltage Supply Power Supply Current - Enabled per amplifier (Note 4) Power Supply Current - Disabled per amplifier Crosstalk PSRR Power Supply Rejection Ratio V mA
IS,OFF
VO = 0 V Channel to Channel, f = 5.0 MHz (See Graph) 40
0.1 60 55
0.3
mA dB dB
4. Guaranteed by design and/or characterization.
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AC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V, VEE = -2.5 V, TA = -40C to +85C, RL = 150 W to GND, RF = 330 W, AV = +2.0, Enable is left open, unless otherwise specified).
Symbol Characteristic Conditions Min Typ Max Unit FREQUENCY DOMAIN PERFORMANCE BW Bandwidth 3.0 dB Small Signal 3.0 dB Large Signal 0.1 dB Gain Flatness Bandwidth Differential Gain Differential Phase MHz AV = +2.0, VO = 0.5 Vp-p AV = +2.0, VO = 1.0 Vp-p AV = +2.0 AV = +2.0, RL = 150 W, f = 3.58 MHz AV = +2.0, RL = 150 W, f = 3.58 MHz AV = +2.0, Vstep = 1.0 V AV = +2.0, Vstep = 1.0 V (10%-90%) AV = +2.0, Vstep = 1.0 V 800 450 100 0.02 0.02 MHz %
GF0.1dB dG dP
TIME DOMAIN RESPONSE SR ts tr tf tON tOFF THD HD2 HD3 IP3 SFDR eN iN Slew Rate Settling Time 0.1% Rise and Fall Time Turn-on Time Turn-off Time 1500 10 1.2 55 55 ns ns ns V/ms ns
HARMONIC/NOISE PERFORMANCE Total Harmonic Distortion 2nd Harmonic Distortion 3rd Harmonic Distortion Third-Order Intercept Spurious-Free Dynamic Range Input Referred Voltage Noise Input Referred Current Noise f = 5.0 MHz, VO = 1.0 Vp-p f = 5.0 MHz, VO = 1.0 Vp-p f = 5.0 MHz, VO = 1.0 Vp-p f = 10 MHz, VO = 0.5 Vp-p f = 5.0 MHz, VO = 1.0 Vp-p f = 1.0 MHz f = 1.0 MHz, Inverting f = 1.0 MHz, Non-Inverting -58 -61 -64 28 61 5.0 20 30 dB dBc dBc dBm dBc nV pA Hz Hz
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DC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V, VEE = -2.5 V, TA = -40C to +85C, RL = 150 W to GND, RF = 330 W, AV = +2.0, Enable is left open, unless otherwise specified).
Symbol DC PERFORMANCE VIO DVIO/DT IIB DIIB/DT VIH VIL Input Offset Voltage Input Offset Voltage Temperature Coefficient Input Bias Current Input Bias Current Temperature Coefficient Input High Voltage (Enable) (Note 5) Input Low Voltage (Enable) (Note 5) +Input (Non-Inverting), VO = 0 V -Input (Inverting), VO = 0 V (Note 5) +Input (Non-Inverting), VO = 0 V -Input (Inverting), VO = 0 V +1.5 +0.5 -10 0 6.0 "3.0 "6.0 +40 -10 "35 "35 +10 mV mV/C mA nA/C V V Characteristic Conditions Min Typ Max Unit
INPUT CHARACTERISTICS VCM CMRR RIN CIN ROUT VO IO VS IS,ON IS,OFF Input Common Mode Voltage Range (Note 5) Common Mode Rejection Ratio Input Resistance Differential Input Capacitance (See Graph) +Input (Non-Inverting) -Input (Inverting) "1.1 40 "1.5 50 150 70 1.0 V dB kW W pF
OUTPUT CHARACTERISTICS Output Resistance Output Voltage Range Output Current Closed Loop Open Loop "1.1 "80 0.1 13 "1.5 "120 5.0 VO = 0 V VO = 0 V Channel to Channel, f = 5.0 MHz (See Graph) 40 6.0 11 0.09 60 55 18 0.3 W V mA
POWER SUPPLY Operating Voltage Supply Power Supply Current - Enabled per amplifier (Note 5) Power Supply Current - Disabled per amplifier Crosstalk PSRR Power Supply Rejection Ratio V mA mA dB dB
5. Guaranteed by design and/or characterization.
VIN
+ - RL
VOUT
RF RF
Figure 4. Typical Test Setup (AV = +2.0, RF = 330 W, RL = 150 W)
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6 NORMALIZED GAIN (dB) 3 0 -3 -6 -9 -12 -15 VOUT = 2.0 VPP AV = +2 VS = 5 V RF = 330 W RL = 150 W 10k 100k 100M 1M 10M FREQUENCY (Hz) 1G 10G VOUT = 0.5 VPP 6 3 0 -3 -6 -9 -12 -15 AV = +1 VS = 5 V RF = 330 W RL = 150 W 10k 100k
NORMALIZED GAIN (dB)
VOUT = 1.0 VPP
VOUT = 0.5 VPP VOUT = 1.0 VPP
1M 10M 100M FREQUENCY (Hz)
1G
10G
Figure 5. Frequency Response: Gain (dB) vs. Frequency AV = +2.0
6 3 0 -3 -6 -9 -12 -15 VOUT = 1.0 VPP VS = 5 V RF = 330 W RL = 150 W 10k 100k 1M 10M 100M FREQUENCY (Hz) 1G 10G AV = +2 AV = +1 NORMALIZED GAIN (dB) 6 3 0 -3 -6 -9 -12 -15
Figure 6. Frequency Response: Gain (dB) vs. Frequency AV = +1.0
AV = +1
NORMALIZED GAIN (dB)
AV = +2
VOUT = 0.5 VPP VS = 5 V RF = 330 W RL = 150 W 10k 100k 1M 10M 100M FREQUENCY (Hz) 1G 10G
Figure 7. Large Signal Frequency Response Gain (dB) vs. Frequency
Figure 8. Small Signal Frequency Response Gain (dB) vs. Frequency
VS = 5 V
VS = 5 V
Figure 9. Small Signal Step Response Vertical: 500 mV/div Horizontal: 10 ns/div
Figure 10. Large Signal Step Response Vertical: 2 V/div Horizontal: 10 ns/div
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-50 -55 DISTORTION (dB) -60 THD -65 -70 -75 -80 HD2 HD3 VOUT = 2 VPP VS = 5 V RF = 330 W RL = 150 W -50 -55 DISTORTION (dB) -60 THD -65 -70 -75 -80 HD3 0.5 1 HD2 f = 5 MHz VS = 5 V RF = 330 W RL = 150 W
1
10 FREQUENCY (MHz)
100
0
1.5
2
2.5
3
3.5
4
4.5
VOUT (VPP)
Figure 11. THD, HD2, HD3 vs. Frequency
60 VS = 5 V VOLTAGE NOISE (nV/Hz) 50 40 30 20 10 0 -30 -35 -40 -45 -50 -55 -25
Figure 12. THD, HD2, HD3 vs. Frequency
VS = 5 V
CMRR (dB)
100
1k
10k FREQUENCY (Hz)
100k
1M
10k
100k
1M FREQUENCY (Hz)
10M
100M
Figure 13. Input Referred Voltage Noise vs. Frequency
Figure 14. CMRR vs. Frequency
0 DIFFERENTIAL GAIN (%) -10 -20 -30 -40 -50 -60 +5 V -5 V 10k 100k 1M FREQUENCY (Hz) 10M 100M
0.03 0.02
10 MHz 20 MHz
50 MHz 3.58 MHz
PSRR (dB)
0.01 0 -0.01 -0.02 -0.03 -0.8 4.43 MHz VS = 5 V RL = 150 W AV = +2 -0.6 0.2 0.4 -0.4 -0.2 0 OFFSET VOLTAGE (V) 0.6 0.8
Figure 15. PSRR vs. Frequency
Figure 16. Differential Gain
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0.03 20 MHz DIFFERENTIAL PHASE () 0.02 3.58 MHz 0.01 0 -0.01 -0.02 -0.03 -0.8 VS = 5 V RL = 150 W AV = +2 0.6 0.8 10 MHz CURRENT (mA) 14 13 12 11 10 9 8 7 6 4 5 6 8 7 9 POWER SUPPLY VOLTAGE (V) 10 11 85C 25C -40C
4.43 MHz
50 MHz -0.6
0.4 -0.4 -0.2 0 0.2 OFFSET VOLTAGE (V)
Figure 17. Differential Phase
Figure 18. Supply Current per Amplifier vs. Power Supply (Enabled)
0.12 0.11 0.10 CURRENT (mA) 0.09 0.08 0.07 0.06 0.05 0.04 4 5 7 9 6 8 POWER SUPPLY VOLTAGE (V) 10 11 -40C 85C 25C OUPUT VOLTAGE (VPP)
9 85C 8 7 6 5 4 3 2 4 5 7 9 6 8 POWER SUPPLY VOLTAGE (V) 10 11 -40C 25C
Figure 19. Supply Current per Amplifier vs. Temperature (Disabled)
Figure 20. Output Voltage Swing vs. Supply Voltage
1M 100 k 10 k 1k 100 10 10k OUTPUT RESISTANCE (W) f = 5 MHz VS = 5 V RF = 330 W RL = 150 W
10 VS = 5 V
TRANSIMPEDANCE (W)
1
0.1
100k
1M
10M
100M
1G
10G
0.01 10k
100k
1M FREQUENCY (Hz)
10M
100M
FREQUENCY (MHz)
Figure 21. Transimpedance (ROL) vs. Frequency
Figure 22. Closed Loop Output Resistance vs. Frequency
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15 12 NORMALIZED GAIN (dB) 9 6 3 0 -3 -6 -9 AV = +2 Vout = 0.5 Vpp VS = 5 V RF = 330 W RL = 150 W 10 pF
47 pF 100 pF
-12 -15 10k
100k
1M
10M
100M
1G
10G
FREQUENCY (Hz)
Figure 23. Frequency Response vs. Capacitive Load
VS = 5V EN OUT VS = 5V
EN
OUT
Output Signal: Squarewave, 10MHz, 2VPP
Output Signal: Squarewave, 10MHz, 2VPP
Figure 24. Turn ON Time Delay Vertical: (EN) 500mV/div (OUT) 1V/div Horizontal: 40ns/div
-20 -30 CROSSTALK (dBc) -40 Channel 1 -50 Channel 3 -60 -70 -80 10k Gain = +2 VS = 5V 3 0 -3 -6 -9 -12
Figure 25. Turn OFF Time Delay Vertical: (EN) 500mV/div (OUT) 1V/div Horizontal: 40ns/div
CH1 CH2
NORMALIZED GAIN (dB)
CH3
100k
1M 100M 10M FREQUENCY (Hz)
1G
10G
-15 10k
AV = +2 VS = 5 V RF = 330 W RL = 150 W 100k 100M 1M 10M FREQUENCY (Hz) 1G 10G
Figure 26. Crosstalk (dBc) vs. Frequency (Crosstalk measured on Channel 2 with input signal on Channel 1 and 3)
Figure 27. Channel Matching vs. Frequency
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General Design Considerations
The current feedback amplifier is optimized for use in high performance video and data acquisition systems. For current feedback architecture, its closed-loop bandwidth depends on the value of the feedback resistor. The closed-loop bandwidth is not a strong function of gain, as is for a voltage feedback amplifier, as shown in Figure 28.
21 18 15 12 9 6 3 0 -3 -6 -9 -12 -15 -18 -21
use a current feedback amplifier with the output shorted directly to the inverting input.
Printed Circuit Board Layout Techniques
RF = 100 W RF = 150 W RF = 200 W RF = 270 W RF = 330 W RF = 400 W RF = 450 W AV = +2 VS = 5 V RL = 150 W 10 k 100 k 1M 10 M RF = 500 W
GAIN (dB)
Proper high speed PCB design rules should be used for all wideband amplifiers as the PCB parasitics can affect the overall performance. Most important are stray capacitances at the output and inverting input nodes as it can effect peaking and bandwidth. A space (3/16 is plenty) should be left around the signal lines to minimize coupling. Also, signal lines connecting the feedback and gain resistors should be short enough so that their associated inductance does not cause high frequency gain errors. Line lengths less than 1/4 are recommended.
Video Performance
100 M
1G
10 G
FREQUENCY (Hz)
This device designed to provide good performance with NTSC, PAL, and HDTV video signals. Best performance is obtained with back terminated loads as performance is degraded as the load is increased. The back termination reduces reflections from the transmission line and effectively masks transmission line and other parasitic capacitances from the amplifier output stage.
ESD Protection
Figure 28. Frequency Response vs. RF
The -3.0 dB bandwidth is, to some extent, dependent on the power supply voltages. By using lower power supplies, the bandwidth is reduced, because the internal capacitance increases. Smaller values of feedback resistor can be used at lower supply voltages, to compensate for this affect.
Feedback and Gain Resistor Selection for Optimum Frequency Response
A current feedback operational amplifier's key advantage is the ability to maintain optimum frequency response independent of gain by using appropriate values for the feedback resistor. To obtain a very flat gain response, the feedback resistor tolerance should be considered as well. Resistor tolerance of 1% should be used for optimum flatness. Normally, lowering RF resistor from its recommended value will peak the frequency response and extend the bandwidth while increasing the value of RF resistor will cause the frequency response to roll off faster. Reducing the value of RF resistor too far below its recommended value will cause overshoot, ringing, and eventually oscillation. Since each application is slightly different, it is worth some experimentation to find the optimal RF for a given circuit. A value of the feedback resistor that produces X0.1 dB of peaking is the best compromise between stability and maximal bandwidth. It is not recommended to
All device pins have limited ESD protection using internal diodes to power supplies as specified in the attributes table (see Figure 29). These diodes provide moderate protection to input overdrive voltages above the supplies. The ESD diodes can support high input currents with current limiting series resistors. Keep these resistor values as low as possible since high values degrade both noise performance and frequency response. Under closed-loop operation, the ESD diodes have no effect on circuit performance. However, under certain conditions the ESD diodes will be evident. If the device is driven into a slewing condition, the ESD diodes will clamp large differential voltages until the feedback loop restores closed-loop operation. Also, if the device is powered down and a large input signal is applied, the ESD diodes will conduct. NOTE: Human Body Model for +IN and -IN pins are rated at 0.8 kV while all other pins are rated at 2.0 kV.
VCC External Pin VEE Internal Circuitry
Figure 29. Internal ESD Protection
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PACKAGE DIMENSIONS
TSSOP-16 CASE 948F-01 ISSUE A
16X K REF
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
K K1
16 9
2X
L/2
J1 B -U-
L
PIN 1 IDENT. 1 8
SECTION N-N
J
N 0.15 (0.006) T U
S
0.25 (0.010) M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
A -V- N F DETAIL E
C 0.10 (0.004) -T- SEATING
PLANE
D
G
H
DETAIL E
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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EC C EE C CEC C
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NCS2535/D

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